1. Field of the Invention
The present invention relates to electronics and, more specifically but not exclusively, to circuitry for data synchronization in serializer-deserializer (SERDES) applications.
2. Description of the Related Art
This section introduces aspects that may help facilitate a better understanding of the invention. Accordingly, the statements of this section are to be read in this light and are not to be understood as admissions about what is prior art or what is not prior art.
In an application having multiple SERDES channels, where each SERDES channel converts a different incoming serial data stream into a corresponding set of outgoing parallel data streams, it is often desirable to align the data in time (i.e., synchronize the data) across the multiple, different sets of outgoing parallel data streams. Due to the complexity of the circuitry required to perform such data synchronization on multiple sets of parallel data streams, it is desirable to perform this data synchronization on the data streams in the serial domain before those channels are converted into the parallel domain.